Department | No. of interns required | Location | Job Description | Requirements | ||
Personality | Computer Skills | Additional | ||||
LDO | 1 | DIT (新店) |
1. LDO star_up with inrush current control (a: constant slew rate b:constant current) 2. UVLO with low IQ and high accuracy |
有學習熱忱 自律 |
1. Cadence/Synopsys EDA tools 2. Microsoft Office 3. Unix/Linux |
1. 熟hspice/spectre and Cadence Virtuoso/ADE environment等者佳 2. 有數位、類比或是混合信號電路模擬經驗 3. 有電路應用及儀器使用經驗 |
SLL | 1 | STOC (台南) |
1. 數位或是混合信號電路模擬 – High speed , low noise low power operational amplifier ð- Chopper Stabilized amplifier ð- Bandgap reference ð- Bidirectional voltage level translator 2. 相關產品之量測 |
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DV | 2 | STOC (台南) |
Design Verification 1. 撰寫數位或是混合信號電路的testbench 2. 建立類比電路的模擬環境 3. 建立自動化比對模擬結果 |
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Timing | 1 | STOC (台南) | Design analog and mixed signal circuit, such as PLL, Serdes, CTLE, ADC, DAC | |||
DCDC | 1 | STOC (台南) |
High Voltage DC/DC Buck Converter: 1. Understanding the circuits specification 2. Simulation of analog integrated circuits and data analysis 3. Design and verification flow using EDA Tools 4. Understanding IC process capabilities and limitations |
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Sensor | 1 | DHC (竹科) |
Sensor building blocks: lower power oscillator, low noise IA, ADC 1. Understanding the circuits specification 2. Simulation of analog integrated circuits and data analysis 3. Design and verification flow using EDA Tools 4. Understanding IC process capabilities and limitations |
1. Knowledge of analog or mixed-signal design fundamentals and exposure to design automation tools is a plus. 2. Good interpersonal and communication skills |
24Mar