研究室網頁連結
積體電路實驗室
重點設備
1. 類比IC設計相關模擬軟體。
2. 示波器、網路分析儀、(AC/DC電流量測系統)、電路板雕刻機、晶片打線機、返修台、防靜電焊接熱風機、邏輯分析儀(專屬示波器用)
研究領域
1. 類比積體電路設計。
2. 應用電路設計。
3. 類比電路分析與合成。
近五年專題計畫
1. 應用於全差動電路的符號分析之研究,(NSC 101-2221-E-151 -074),2012/08/01~2013/07/31,主持人。
2. 高效能之電路符號節點分析法(NSC 100-2221-E-151 -065),2011/08/01 ~ 2012/07/31,主持人。
3. 多功能反轉移函數電路合成技術開發,(NSC 99-2221-E-151 -063),2010/08/01 ~ 2011/07/31,主持人。
4. 高輸入動態範圍CMOS低電壓電流鏡之設計(NSC 97-2221-E-151 -047),2008/08/01 ~ 2009/07/31,主持人
過去五年之研究成果
1. “A novel instrumentation circuit for electrochemical measurements,” Sensors, 12, pp. 9687-9696,2012,本論文之成果可量測電化學電路。
2. “Symbolic nodal analysis of circuits using pathological elements,” IEEE Transactions on Circuits and Systems II: Express Briefs, 57, 11, pp. 874-877, 2010,本研究成果可用於增進自動化電路符號分析效率。
3. “CMOS current mirror with enhanced input dynamic range,” International Journal of Circuit Theory and Applications, 38, 7, pp. 761-769, 2010,本研究成果可用以設計各類型運算放大器IC。
4. “New nullor–mirror equivalences,” International Journal of Electronics and Communications (AEU), 64, pp. 828-832, 2010,本研究成果可用以合成類比信號處理電路。
研究計畫
1.產學合作計畫-加強警戒效果特色型煞車燈之研 製,2008/08/01~2009/07/31 ,主持人。
2.高輸入動態範圍CMOS低電壓電流鏡之設計 2008/08/01 ~ 2009/07/31,主持人。
重要著作
1. Y.C. Liu, H.Y. Wang, Y.L. Jeang, and Y.W. Huang, “A CMOS current mirror with enhanced input dynamic range,” ICICIC ’08. pp. 571-574, 2008.
2. Ying-Chuan Liu, Hung-Yu Wang, Yuan-Long Jeang,and Yu-Wei Huang, “ A CMOS Current Mirror with Enhanced Input Dynamic Range”, International Conference on Innovative Computing Informatio and Control, 18-20 June, 2008
3. Yuan-Long Jeang, Tzuu-Shaang Wey, Hung-Yu Wang, Ching-Ta Chen, “A Pre -processing Based Real-Time Address Tracer for Embedded Microprocessors”, the
13th IEEE International Conference on Electronics, Circuits and Systems, 10-13 Dec., 2006, Nice, France.
4. Yuan-Long Jeang , Tzuu-Shaang Wey, Hung-Yu Wang , and Chih-Chung Tai, “A Single-Stream Pipelined Instruction Decompression System for Embedded Microprocessors” 2006 IEEE International Conference on Intelligent Information Hiding and Multimedia Signal Processing. 17-20 Dec. 2006, Pasadena, California, USA.
5. C.Y. Huang , T.T. Hou, and H.Y. Wang, “ A 12-bit 250-MHz current-steering DAC,” International Conference on ASIC, 2005.
6. H.Y. Wang, C.Y. Huang, and Y.C. Liu, “Comment: A note on determination of oscillation startup condition,” Analog Integrated Circuits and Signal Processing. 51, pp. 57–58, 2007.
7. H.Y. Wang, C.T. Lee, and C.Y. Huang, “Characteristic Investigation of new pathological elements,”Analog Integrated Circuits and Signal Processing. 44, pp. 95–102, 2005.
8. C.S. Lee, H.Y. Wang and C.T. Lee, “The adjoint realization of multiple nput/output filters,”International Journal of Electrical Engineering, 10, pp. 183-188, 2003.
9. C. Y. Huang, T. T. Hou, C. C. Chuang, and H. Y. Wang, “Design of a 12-bit 100-MHz current-steering DAC for SOC applications,” International Workshop on System on Chip for Real Time Applications, pp. 117-122, 2005
10. T. Y. Lin, Y. Z. Juang, H. Y. Wang, and C. F. Chiu, “A low power 2.2-2.6GHz CMOS VCO with a symmetrical spiral inductor,” International Symposium on Circuits and Systems, pp. 641-644, 2003
近三年內參與教育部舉辦之相關活動或競賽情形
教育部96年度IC設計競賽獲得全客戶式設計組特優一隊、佳作兩隊
教育部97年度IC設計競賽獲得類比IC設計組佳作一隊